Introduction - If you have any usage issues, please Google them yourself
FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
Packet : 73462666uart(fpga).rar filelist
UART.doc