Introduction - If you have any usage issues, please Google them yourself
to TI's DSP TMS32OC6204 example, The combined company IDT FIFO-chip cache IDT72V3640. on the expansion of the bus XB under the control of DMA FIFO read, write, in order to achieve the real-time image acquisition, handle.
Packet : 115157713fifo2.pdf.rar filelist
!!!040318[1].pdf.pdf