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synplicity8.0
Downloaded:0
Electronic design automation (EDA) compa ny providing logic synthesis and analysis tool 's for FPGA and ASIC designers.
Update
: 2024-10-05
Size
: 247kb
Publisher
:
陈亨利
PPM-PPT
Downloaded:0
project management PDF file. From PSP- TSP-CMMI. With a description of quite good documentation
Update
: 2024-10-05
Size
: 398kb
Publisher
:
我是谁
cmmi1
Downloaded:0
Capability Maturity Model Integration, Version 1.1 CMMI for Systems Engineering and So Industrial Engineering
Update
: 2024-10-05
Size
: 1.35mb
Publisher
:
我是谁
hwb12pdf
Downloaded:0
hard on the structure and zoning. Hard disk partition table and document distribution table only after physical hard disk formatting, zoning, logical format as soon as possible. conducting district, FDISK the hard drive
Update
: 2024-10-05
Size
: 739kb
Publisher
:
zgb
VXDFSP
Downloaded:0
using VXD Technology File System Protection examples.
Update
: 2024-10-05
Size
: 146kb
Publisher
:
zgb
ddkdoc
Downloaded:0
WIN2000 Driver Design Guide; DDK learning experience; Visual Studio 6.0 integrated development environment of the device driver; Driver Development Tools briefing.
Update
: 2024-10-05
Size
: 2.47mb
Publisher
:
zgb
ifsdoc
Downloaded:0
file system driver development Documentation (IFS DDK), including new file filters Interface Programmer's Guide. rar, the hard drive monitoring. txt, Redirector operation. txt, redirect registry. txt, DLL function redire
Update
: 2024-10-05
Size
: 488kb
Publisher
:
zgb
digital_system-VHDL
Downloaded:0
Digital System Design with VHDL language [PPT Guide], very useful.
Update
: 2024-10-05
Size
: 911kb
Publisher
:
huangxi
LIEZHU1
Downloaded:0
main-solving linear equations original code
Update
: 2024-10-05
Size
: 1kb
Publisher
:
李兆军
3layers
Downloaded:0
VB development of the three-tier architecture and database programming principle several examples
Update
: 2024-10-05
Size
: 77kb
Publisher
:
xzbfhj
umlrose
Downloaded:0
the purpose of the handbook is to use the Step-by-step guide, and to provide a use Rational Rose UML CASE tools to create a complete UML model Examples. The Guide is intended for those who want to efficient use Rational
Update
: 2024-10-05
Size
: 2.66mb
Publisher
:
尤凤凯
010919.pdf
Downloaded:0
DPLL VHDL description and achieve functional simulation, followed by graphic shows
Update
: 2024-10-05
Size
: 280kb
Publisher
:
巢海步
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8590
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