Under FPGA with base 2 cooley-tukey of 8 FFT algorithm VHDL realize, in quartus ii environment successfully verified.

FFT\.qsys_edit\filters.xml
...\..........\preferences.xml
...\adder.bsf
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...\addr_3.v
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...\addr_maker.bdf
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...\db\add_sub_mbg.tdf
...\..\add_sub_ncg.tdf
...\..\add_sub_obg.tdf
...\..\add_sub_pcg.tdf
...\..\add_sub_qcg.tdf
...\..\altsyncram_11a1.tdf
...\..\altsyncram_i1a1.tdf
...\..\altsyncram_kka1.tdf
...\..\altsyncram_mo91.tdf
...\..\altsyncram_u0a1.tdf
...\..\FFT_VHDL.amm.cdb
...\..\FFT_VHDL.asm.qmsg
...\..\FFT_VHDL.asm.rdb
...\..\FFT_VHDL.asm_labs.ddb
...\..\FFT_VHDL.cbx.xml
...\..\FFT_VHDL.cmp.bpm
...\..\FFT_VHDL.cmp.cdb
...\..\FFT_VHDL.cmp.hdb
...\..\FFT_VHDL.cmp.kpt
...\..\FFT_VHDL.cmp.logdb
...\..\FFT_VHDL.cmp.rdb
...\..\FFT_VHDL.cmp_merge.kpt
...\..\FFT_VHDL.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
...\..\FFT_VHDL.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
...\..\FFT_VHDL.db_info
...\..\FFT_VHDL.eda.qmsg
...\..\FFT_VHDL.fit.qmsg
...\..\FFT_VHDL.hier_info
...\..\FFT_VHDL.hif
...\..\FFT_VHDL.idb.cdb
...\..\FFT_VHDL.lpc.html
...\..\FFT_VHDL.lpc.rdb
...\..\FFT_VHDL.lpc.txt
...\..\FFT_VHDL.map.bpm
...\..\FFT_VHDL.map.cdb
...\..\FFT_VHDL.map.hdb
...\..\FFT_VHDL.map.kpt
...\..\FFT_VHDL.map.logdb
...\..\FFT_VHDL.map.qmsg
...\..\FFT_VHDL.map_bb.cdb
...\..\FFT_VHDL.map_bb.hdb
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...\..\FFT_VHDL.pre_map.cdb
...\..\FFT_VHDL.pre_map.hdb
...\..\FFT_VHDL.root_partition.map.reg_db.cdb
...\..\FFT_VHDL.rtlv.hdb
...\..\FFT_VHDL.rtlv_sg.cdb
...\..\FFT_VHDL.rtlv_sg_swap.cdb
...\..\FFT_VHDL.sgdiff.cdb
...\..\FFT_VHDL.sgdiff.hdb
...\..\FFT_VHDL.sld_design_entry.sci
...\..\FFT_VHDL.sld_design_entry_dsc.sci
...\..\FFT_VHDL.smart_action.txt
...\..\FFT_VHDL.smp_dump.txt
...\..\FFT_VHDL.sta.qmsg
...\..\FFT_VHDL.sta.rdb
...\..\FFT_VHDL.sta_cmp.8_slow_1200mv_85c.tdb
...\..\FFT_VHDL.syn_hier_info
...\..\FFT_VHDL.tiscmp.fastest_slow_1200mv_0c.ddb
...\..\FFT_VHDL.tiscmp.fastest_slow_1200mv_85c.ddb
...\..\FFT_VHDL.tiscmp.fast_1200mv_0c.ddb
...\..\FFT_VHDL.tiscmp.slow_1200mv_0c.ddb
...\..\FFT_VHDL.tiscmp.slow_1200mv_85c.ddb
...\..\FFT_VHDL.tis_db_list.ddb
...\..\logic_util_heursitic.dat

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