Toggle P1.0 using software and TA_0 ISR. Toggles every // 50000 SMCLK cycles. SMCLK provides clock source for TACLK. // During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to // CCR0. TA_0 ISR is triggered every 50000 cycles. CPU is normally off and

msp430afe_ta_01.c

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