The design is based EP4CE15F17C8N and 12864 LCD frequency meter program

calendar_module.v.bak
clock_rom_module.qip
count_module.v
count_module.v.bak
date_rom_module.qip
fre_module.v
fre_module.v.bak
lcd_control_module.v
lcd_control_module.v.bak
lcd_module.asm.rpt
lcd_module.cdf
lcd_module.done
lcd_module.eda.rpt
lcd_module.fit.rpt
lcd_module.fit.smsg
lcd_module.fit.summary
lcd_module.flow.rpt
lcd_module.map.rpt
lcd_module.map.smsg
lcd_module.map.summary
lcd_module.merge.rpt
lcd_module.pin
lcd_module.pof
lcd_module.qpf
lcd_module.qsf
lcd_module.qws
lcd_module.restore.rpt
lcd_module.sof
lcd_module.sta.rpt
lcd_module.sta.summary
lcd_module.v
lcd_module.v.bak
lcd_module_assignment_defaults.qdf
mode_module.v
mode_module.v.bak
pika_rom_module.qip
week_rom_module.qip
clock\clock_control_module.v
.....\clock_control_module.v.bak
.....\clock_module.v
.....\clock_module.v.bak
.....\clock_rom_module.qip
.....\spi_write_module\spi_write_module.v
.....\................\spi_write_module.v.bak
.....\initial_module\clock_initial_control_module.v
.....\..............\clock_initial_control_module.v.bak
.....\..............\clock_initial_module.v
.....\..............\clock_initial_module.v.bak
.....\draw_module\clock_draw_control_module.v
.....\...........\clock_draw_control_module.v.bak
.....\...........\clock_draw_module.v
.....\...........\clock_draw_module.v.bak
.....\...........\clock_firstDisplay_control_module.v
.....\...........\clock_firstDisplay_control_module.v.bak
.....\...........\pika_rom_module\clock_rom_module.qip
.....\...........\...............\clock_rom_module.v
.....\...........\...............\clock_rom_module.v.bak
.....\...........\...............\clock_rom_module_bb.v
.....\...........\...............\pika_face_mif\clock.hex
.....\...........\...............\.............\greybox_tmp\cbx_args.txt
.....\...........\...............\greybox_tmp\cbx_args.txt
data_ds1302\cmd_control_module.v
...........\cmd_control_module.v.bak
...........\Data_1302.v
...........\Data_1302.v.bak
...........\day_amount.v
...........\day_amount.v.bak
...........\ds1302_module.v
...........\function_module.v
...........\function_module.v.bak
.b\add_sub_7pc.tdf
..\add_sub_8pc.tdf
..\altsyncram_12f1.tdf
..\altsyncram_12f1.tdf.bak
..\altsyncram_4ab1.tdf
..\altsyncram_d5b1.tdf
..\altsyncram_d8b1.tdf
..\altsyncram_g3d1.tdf
..\altsyncram_g3d1.tdf.bak
..\altsyncram_ji81.tdf
..\altsyncram_l5b1.tdf
..\altsyncram_o3d1.tdf
..\altsyncram_o3d1.tdf.bak
..\altsyncram_s9b1.tdf
..\alt_u_div_07f.tdf
..\alt_u_div_0af.tdf
..\alt_u_div_27f.tdf
..\alt_u_div_2af.tdf
..\alt_u_div_37f.tdf
..\alt_u_div_47f.tdf
..\alt_u_div_57f.tdf
..\alt_u_div_67f.tdf
..\alt_u_div_6af.tdf
..\alt_u_div_77f.tdf
..\alt_u_div_7af.tdf
..\alt_u_div_84f.tdf
..\alt_u_div_8af.tdf
..\alt_u_div_94f.tdf
..\alt_u_div_9af.tdf
..\alt_u_div_a4f.tdf

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