UART interface is widely used in the procedures and information to adjust the output. This experiment will introduce self-UART interface and debugging example, through these two examples to grasp the UART design methods and the use of HyperTerminal.

Packet : 55593417uart_verilog.rar filelist
verilog\print_char\clock_gen_select.v
verilog\print_char\rs232rx.v
verilog\print_char\rs232tx.v
verilog\print_char\rs232_char_top.v
verilog\print_char\uart_char_rom.v
verilog\print_char
verilog\test_loop\clock_gen_select.v
verilog\test_loop\rs232rx.v
verilog\test_loop\rs232tx.v
verilog\test_loop\rs232_top.v
verilog\test_loop
verilog\uart_debug\clock_gen_select.v
verilog\uart_debug\data_count.v
verilog\uart_debug\debug_top.v
verilog\uart_debug\rs232rx.v
verilog\uart_debug\rs232tx.v
verilog\uart_debug\uart_debug.v
verilog\uart_debug
verilog

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