Realization of counter function based on FPGA with Verilog

counter\counter.gise
.......\counter.v
.......\counter.xise
.......\counter_beh.prj
.......\counter_summary.html
.......\fuse.log
.......\fuse.xmsgs
.......\fuseRelaunch.cmd
.......\iseconfig\counter.projectmgr
.......\.........\counter.xreport
.......\..im\counter_isim_beh.exe.sim\work\counter_isim_beh.exe_main.c
.......\....\........................\....\counter_isim_beh.exe_main.nt.obj
.......\....\........................\....\m_00000000001477170499_2582214024.c
.......\....\........................\....\m_00000000001477170499_2582214024.didat
.......\....\........................\....\m_00000000001477170499_2582214024.nt.obj
.......\....\........................\....\m_00000000004134447467_2073120511.c
.......\....\........................\....\m_00000000004134447467_2073120511.didat
.......\....\........................\....\m_00000000004134447467_2073120511.nt.obj
.......\....\pn_info
.......\....\work\counter.sdb
.......\....\....\glbl.sdb
.......\tb_counter.v
.......\tb_counter_beh.prj
.......\xilinxsim.ini
.......\_xmsgs\pn_parser.xmsgs
.......\isim\counter_isim_beh.exe.sim\work
.......\....\counter_isim_beh.exe.sim
.......\....\work
.......\ipcore_dir
.......\iseconfig
.......\isim
.......\_xmsgs
counter

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