spi gpio

rd1142_spi_slave_controller\rd1142
...........................\......\docs
...........................\......\....\~$revision_history.xlsx
...........................\......\....\rd1142.pdf
...........................\......\....\rd1142_readme.txt
...........................\......\project
...........................\......\.......\iCE40
...........................\......\.......\.....\vhdl
...........................\......\.......\.....\....\iCE40_vhdl
...........................\......\.......\.....\....\..........\iCE40_vhdl_sbt.project
...........................\......\.......\.....\....\..........\iCE40_vhdl_syn.prj
...........................\......\simulation
...........................\......\..........\iCE40
...........................\......\..........\.....\vhdl
...........................\......\..........\.....\....\rtl_vhdl.do
...........................\......\..........\.....\....\timing_vhdl.do
...........................\......\source
...........................\......\......\verilog
...........................\......\......\.......\spi_slave_top.v
...........................\......\......\vhdl
...........................\......\......\....\spi_slave.vhd
...........................\......\testbench
...........................\......\.........\vhdl
...........................\......\.........\....\spi_slave_tb.vhd

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