control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster

Packet : 91331950t4_sdram_control.rar filelist
T4_sdram_control\sdram_control.qpf
T4_sdram_control\sdram_control.qsf
T4_sdram_control\db\sdram_control.db_info
T4_sdram_control\db\sdram_control.map.qmsg
T4_sdram_control\db\sdram_control.sld_design_entry.sci
T4_sdram_control\db\sdram_control.eco.cdb
T4_sdram_control\db
T4_sdram_control\Command.v
T4_sdram_control\control_interface.v
T4_sdram_control\Params.v
T4_sdram_control\sdr_data_path.v
T4_sdram_control\sdr_sdram.v
T4_sdram_control\sdr_sdram.bsf
T4_sdram_control\sdram_control.done
T4_sdram_control\sdram_control.bdf
T4_sdram_control\sdr_data_path.bsf
T4_sdram_control\control_interface.bsf
T4_sdram_control\command.bsf
T4_sdram_control\sdram_control.qws
T4_sdram_control

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