Introduction - If you have any usage issues, please Google them yourself
VHDL language using this procedure to complete the four binary adder, and the output is BCD code
Packet : 95302907eecadd_4.rar filelist
eecadd_4\eecadd_4(1).cnf
eecadd_4\eecadd_4(2).cnf
eecadd_4\eecadd_4(3).cnf
eecadd_4\eecadd_4(4).cnf
eecadd_4\eecadd_4(5).cnf
eecadd_4\eecadd_4.acf
eecadd_4\eecadd_4.cnf
eecadd_4\eecadd_4.fit
eecadd_4\eecadd_4.hex
eecadd_4\eecadd_4.hif
eecadd_4\eecadd_4.mmf
eecadd_4\eecadd_4.ndb
eecadd_4\eecadd_4.pin
eecadd_4\eecadd_4.pof
eecadd_4\eecadd_4.rpt
eecadd_4\eecadd_4.scf
eecadd_4\eecadd_4.snf
eecadd_4\eecadd_4.sof
eecadd_4\EECADD_4.sym
eecadd_4\eecadd_4.ttf
eecadd_4\eecadd_4.vhd
eecadd_4\LIB.DLS
eecadd_4\U0359051.DLS
eecadd_4\U4090266.DLS
eecadd_4\U5598134.DLS
eecadd_4