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an485_design_example

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  • Update : 2008-10-13
  • Size : 305.25kb
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  • Author :zhiqiang
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Introduction - If you have any usage issues, please Google them yourself
Serial peripheral interface host (verilog SPI) in an485_ch-max II CPLD
Packet file list
(Preview for download)
Packet : 117143180an485_design_example.zip filelist
code/
code/SPI_Master.v
modelsim/
modelsim/SPI_Master.cr.mti
modelsim/SPI_Master.mpf
modelsim/SPI_Master.v
modelsim/SPI_Master_test.v
modelsim/SPI_Master_test.v.bak
modelsim/transcript
modelsim/vsim.wlf
modelsim/wave.bmp
modelsim/wave.do
modelsim/work/
modelsim/work/@s@p@i_@master/
modelsim/work/@s@p@i_@master/verilog.psm
modelsim/work/@s@p@i_@master/_primary.dat
modelsim/work/@s@p@i_@master/_primary.vhd
modelsim/work/@s@p@i_master_test/
modelsim/work/@s@p@i_master_test/verilog.psm
modelsim/work/@s@p@i_master_test/_primary.dat
modelsim/work/@s@p@i_master_test/_primary.vhd
modelsim/work/_info
quartus/
quartus/db/
quartus/db/prev_cmp_SPI_Master.asm.qmsg
quartus/db/prev_cmp_SPI_Master.fit.qmsg
quartus/db/prev_cmp_SPI_Master.map.qmsg
quartus/db/prev_cmp_SPI_Master.tan.qmsg
quartus/db/SPI_Master.(0).cnf.cdb
quartus/db/SPI_Master.(0).cnf.hdb
quartus/db/SPI_Master.asm.qmsg
quartus/db/SPI_Master.asm_labs.ddb
quartus/db/SPI_Master.cbx.xml
quartus/db/SPI_Master.cmp.cdb
quartus/db/SPI_Master.cmp.hdb
quartus/db/SPI_Master.cmp.logdb
quartus/db/SPI_Master.cmp.rdb
quartus/db/SPI_Master.cmp.tdb
quartus/db/SPI_Master.cmp0.ddb
quartus/db/SPI_Master.dbp
quartus/db/SPI_Master.db_info
quartus/db/SPI_Master.eco.cdb
quartus/db/SPI_Master.fit.qmsg
quartus/db/SPI_Master.hier_info
quartus/db/SPI_Master.hif
quartus/db/SPI_Master.map.cdb
quartus/db/SPI_Master.map.hdb
quartus/db/SPI_Master.map.logdb
quartus/db/SPI_Master.map.qmsg
quartus/db/SPI_Master.pre_map.cdb
quartus/db/SPI_Master.pre_map.hdb
quartus/db/SPI_Master.psp
quartus/db/SPI_Master.pss
quartus/db/SPI_Master.rtlv.hdb
quartus/db/SPI_Master.rtlv_sg.cdb
quartus/db/SPI_Master.rtlv_sg_swap.cdb
quartus/db/SPI_Master.sgdiff.cdb
quartus/db/SPI_Master.sgdiff.hdb
quartus/db/SPI_Master.signalprobe.cdb
quartus/db/SPI_Master.sld_design_entry.sci
quartus/db/SPI_Master.sld_design_entry_dsc.sci
quartus/db/SPI_Master.syn_hier_info
quartus/db/SPI_Master.tan.qmsg
quartus/db/SPI_Master.tis_db_list.ddb
quartus/SPI_Master.asm.rpt
quartus/SPI_Master.done
quartus/SPI_Master.dpf
quartus/SPI_Master.fit.rpt
quartus/SPI_Master.fit.smsg
quartus/SPI_Master.fit.summary
quartus/SPI_Master.flow.rpt
quartus/SPI_Master.map.rpt
quartus/SPI_Master.map.smsg
quartus/SPI_Master.map.summary
quartus/SPI_Master.pin
quartus/SPI_Master.pof
quartus/SPI_Master.qpf
quartus/SPI_Master.qsf
quartus/SPI_Master.qws
quartus/SPI_Master.tan.rpt
quartus/SPI_Master.tan.summary
quartus/SPI_Master.v
quartus/SPI_Master_assignment_defaults.qdf
testbench/
testbench/SPI_Master_test.v
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