38 decoder design, the use of decoder VHDL design, you can download to watch the outcome of the development board

Packet : 105230314lab2.rar filelist
LAB2\altera_vhdl_support.vhd
LAB2\build.mak
LAB2\build.sh
LAB2\cmp_state.ini
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LAB2\db\cntr_c58.tdf
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LAB2\db\decode_rpe.tdf
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LAB2\small_2C35.vhd
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LAB2\TFFLOP.bsf
LAB2\TFFLOP.vhd
LAB2\db
LAB2

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