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  • Update : 2008-10-13
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  • Author :swelgan
  • About : swelgan
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Introduction - If you have any usage issues, please Google them yourself
The source code is to achieve a 8051 mcu core of the VHDL code, interrupt, timer and other full-featured, and includes details of the various parts of the test document
Packet file list
(Preview for download)
Packet : 75448156mc_8051.rar filelist
synpl\mc8051_core.prj
synpl
tb\mc8051_ramx_.vhd
tb\mc8051_ramx_sim.vhd
tb\mc8051_ramx_sim_cfg.vhd
tb\mc8051_ram_.vhd
tb\mc8051_ram_sim.vhd
tb\mc8051_ram_sim_cfg.vhd
tb\mc8051_rom_.vhd
tb\mc8051_rom_sim.vhd
tb\mc8051_rom_sim_cfg.vhd
tb\tb_mc8051_alu_.vhd
tb\tb_mc8051_alu_sim.vhd
tb\tb_mc8051_alu_sim_cfg.vhd
tb\tb_mc8051_siu_.vhd
tb\tb_mc8051_siu_sim.vhd
tb\tb_mc8051_siu_sim_cfg.vhd
tb\tb_mc8051_tmrctr_.vhd
tb\tb_mc8051_tmrctr_sim.vhd
tb\tb_mc8051_tmrctr_sim_cfg.vhd
tb\tb_mc8051_top_.vhd
tb\tb_mc8051_top_sim.vhd
tb\tb_mc8051_top_sim_cfg.vhd
tb
doc\8051_overview.pdf
doc\comp_orig_ipcore.pdf
doc\mc8051_overview.pdf
doc\mc8051_user_guide.pdf
doc
msim\hex2dual.c
msim\keil.dua
msim\keil.hex
msim\mc8051.cr.mti
msim\mc8051.mpf
msim\mc8051_compile.do
msim\mc8051_rom.dua
msim\mc8051_sim.do
msim\mc8051_wave.do
msim\readme.txt
msim\regs.log
msim\tc1.asm
msim\tc1.dua
msim\tc1.hex
msim\vsim.wlf
msim\work\addsub_core\struc.dat
msim\work\addsub_core\_primary.dat
msim\work\addsub_core
msim\work\addsub_core_struc_cfg\_primary.dat
msim\work\addsub_core_struc_cfg
msim\work\addsub_cy\rtl.dat
msim\work\addsub_cy\_primary.dat
msim\work\addsub_cy
msim\work\addsub_cy_rtl_cfg\_primary.dat
msim\work\addsub_cy_rtl_cfg
msim\work\addsub_ovcy\rtl.dat
msim\work\addsub_ovcy\_primary.dat
msim\work\addsub_ovcy
msim\work\addsub_ovcy_rtl_cfg\_primary.dat
msim\work\addsub_ovcy_rtl_cfg
msim\work\alucore\rtl.dat
msim\work\alucore\_primary.dat
msim\work\alucore
msim\work\alucore_rtl_cfg\_primary.dat
msim\work\alucore_rtl_cfg
msim\work\alumux\rtl.dat
msim\work\alumux\_primary.dat
msim\work\alumux
msim\work\alumux_rtl_cfg\_primary.dat
msim\work\alumux_rtl_cfg
msim\work\comb_divider\rtl.dat
msim\work\comb_divider\_primary.dat
msim\work\comb_divider
msim\work\comb_divider_rtl_cfg\_primary.dat
msim\work\comb_divider_rtl_cfg
msim\work\comb_mltplr\rtl.dat
msim\work\comb_mltplr\_primary.dat
msim\work\comb_mltplr
msim\work\comb_mltplr_rtl_cfg\_primary.dat
msim\work\comb_mltplr_rtl_cfg
msim\work\control_fsm\rtl.dat
msim\work\control_fsm\_primary.dat
msim\work\control_fsm
msim\work\control_fsm_rtl_cfg\_primary.dat
msim\work\control_fsm_rtl_cfg
msim\work\control_mem\rtl.dat
msim\work\control_mem\_primary.dat
msim\work\control_mem
msim\work\control_mem_rtl_cfg\_primary.dat
msim\work\control_mem_rtl_cfg
msim\work\dcml_adjust\rtl.dat
msim\work\dcml_adjust\_primary.dat
msim\work\dcml_adjust
msim\work\dcml_adjust_rtl_cfg\_primary.dat
msim\work\dcml_adjust_rtl_cfg
msim\work\mc8051_alu\struc.dat
msim\work\mc8051_alu\_primary.dat
msim\work\mc8051_alu
msim\work\mc8051_alu_struc_cfg\_primary.dat
msim\work\mc8051_alu_struc_cfg
msim\work\mc8051_control\struc.dat
msim\work\mc8051_control\_primary.dat
msim\work\mc8051_control
msim\work\mc8051_control_struc_cfg\_primary.dat
msim\work\mc8051_control_struc_cfg
msim\work\mc8051_core\struc.dat
msim\work\mc8051_core\_primary.dat
msim\work\mc8051_core
msim\work\mc8051_core_struc_cfg\_primary.dat
msim\work\mc8051_core_struc_cfg
msim\work\mc8051_p\_primary.dat
msim\work\mc8051_p
msim\work\mc8051_ram\sim.dat
msim\work\mc8051_ram\_primary.dat
msim\work\mc8051_ram
msim\work\mc8051_ramx\sim.dat
msim\work\mc8051_ramx\_primary.dat
msim\work\mc8051_ramx
msim\work\mc8051_ramx_sim_cfg\_primary.dat
msim\work\mc8051_ramx_sim_cfg
msim\work\mc8051_ram_sim_cfg\_primary.dat
msim\work\mc8051_ram_sim_cfg
msim\work\mc8051_rom\sim.dat
msim\work\mc8051_rom\_primary.dat
msim\work\mc8051_rom
msim\work\mc8051_rom_sim_cfg\_primary.dat
msim\work\mc8051_rom_sim_cfg
msim\work\mc8051_siu\rtl.dat
msim\work\mc8051_siu\_primary.dat
msim\work\mc8051_siu
msim\work\mc8051_siu_rtl_cfg\_primary.dat
msim\work\mc8051_siu_rtl_cfg
msim\work\mc8051_tmrctr\rtl.dat
msim\work\mc8051_tmrctr\_primary.dat
msim\work\mc8051_tmrctr
msim\work\mc8051_tmrctr_rtl_cfg\_primary.dat
msim\work\mc8051_tmrctr_rtl_cfg
msim\work\mc8051_top\struc.dat
msim\work\mc8051_top\_primary.dat
msim\work\mc8051_top
msim\work\mc8051_top_struc_cfg\_primary.dat
msim\work\mc8051_top_struc_cfg
msim\work\tb_mc8051_top\sim.dat
msim\work\tb_mc8051_top\_primary.dat
msim\work\tb_mc8051_top
msim\work\tb_mc8051_top_sim_cfg\_primary.dat
msim\work\tb_mc8051_top_sim_cfg
msim\work\_info
msim\work\_opt\work_addsub_core_struc_cfg__vhdl__1.asm
msim\work\_opt\work_addsub_core_struc__1.asm
msim\work\_opt\work_addsub_cy_rtl.asm
msim\work\_opt\work_addsub_cy_rtl_cfg__vhdl.asm
msim\work\_opt\work_addsub_ovcy_rtl.asm
msim\work\_opt\work_addsub_ovcy_rtl_cfg__vhdl.asm
msim\work\_opt\work_alucore_rtl_cfg__vhdl__1.asm
msim\work\_opt\work_alucore_rtl__1.asm
msim\work\_opt\work_alumux_rtl_cfg__vhdl__1.asm
msim\work\_opt\work_alumux_rtl__1.asm
msim\work\_opt\work_comb_divider_rtl.asm
msim\work\_opt\work_comb_divider_rtl_cfg__vhdl.asm
msim\work\_opt\work_comb_mltplr_rtl.asm
msim\work\_opt\work_comb_mltplr_rtl_cfg__vhdl.asm
msim\work\_opt\work_control_fsm_rtl.asm
msim\work\_opt\work_control_fsm_rtl_cfg__vhdl.asm
msim\work\_opt\work_control_mem_rtl.asm
msim\work\_opt\work_control_mem_rtl_cfg__vhdl.asm
msim\work\_opt\work_dcml_adjust_rtl.asm
msim\work\_opt\work_dcml_adjust_rtl_cfg__vhdl.asm
msim\work\_opt\work_mc8051_alu_struc_cfg__vhdl__1.asm
msim\work\_opt\work_mc8051_alu_struc__1.asm
msim\work\_opt\work_mc8051_control_struc.asm
msim\work\_opt\work_mc8051_control_struc_cfg__vhdl.asm
msim\work\_opt\work_mc8051_core_struc_cfg__vhdl__1.asm
msim\work\_opt\work_mc8051_core_struc__1.asm
msim\work\_opt\work_mc8051_p__vhdl.asm
msim\work\_opt\work_mc8051_ramx_sim.asm
msim\work\_opt\work_mc8051_ramx_sim_cfg__vhdl.asm
msim\work\_opt\work_mc8051_ram_sim.asm
msim\work\_opt\work_mc8051_ram_sim_cfg__vhdl.asm
msim\work\_opt\work_mc8051_rom_sim.asm
msim\work\_opt\work_mc8051_rom_sim_cfg__vhdl.asm
msim\work\_opt\work_mc8051_siu_rtl.asm
msim\work\_opt\work_mc8051_siu_rtl_cfg__vhdl.asm
msim\work\_opt\work_mc8051_tmrctr_rtl.asm
msim\work\_opt\work_mc8051_tmrctr_rtl_cfg__vhdl.asm
msim\work\_opt\work_mc8051_top_struc_cfg__vhdl__1.asm
msim\work\_opt\work_mc8051_top_struc__1.asm
msim\work\_opt\work_tb_mc8051_top_sim_cfg__vhdl__1.asm
msim\work\_opt\work_tb_mc8051_top_sim__1.asm
msim\work\_opt\work__info
msim\work\_opt\_deps
msim\work\_opt\__model_tech_.._ieee__info
msim\work\_opt\__model_tech_.._std__info
msim\work\_opt
msim\work\_temp
msim\work
msim\write2file.do
msim
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