Verilog language used to achieve the JK flip-flop can be integrated to simulation through

Packet : 79419098jk_ff.rar filelist
JK_FF\JK_FF.qpf
JK_FF\JK_FF.qsf
JK_FF\JK_FF.v
JK_FF\JK_FF.map.eqn
JK_FF\JK_FF.map.rpt
JK_FF\JK_FF.flow.rpt
JK_FF\JK_FF.map.summary
JK_FF\JK_FF.fit.eqn
JK_FF\JK_FF.pin
JK_FF\JK_FF.fit.rpt
JK_FF\JK_FF.fit.summary
JK_FF\JK_FF.pof
JK_FF\JK_FF.asm.rpt
JK_FF\JK_FF.tan.summary
JK_FF\JK_FF.tan.rpt
JK_FF\JK_FF.done
JK_FF\JK_FF.vwf
JK_FF\JK_FF.sim.rpt
JK_FF\JK_FF.qws
JK_FF\cmp_state.ini
JK_FF\db\JK_FF.db_info
JK_FF\db\JK_FF.map.qmsg
JK_FF\db\JK_FF.hif
JK_FF\db\JK_FF.(0).cnf.cdb
JK_FF\db\JK_FF.(0).cnf.hdb
JK_FF\db\JK_FF.hier_info
JK_FF\db\JK_FF.rtlv_sg.cdb
JK_FF\db\JK_FF.rtlv.hdb
JK_FF\db\JK_FF.rtlv_sg_swap.cdb
JK_FF\db\JK_FF.pre_map.hdb
JK_FF\db\JK_FF.pre_map.cdb
JK_FF\db\JK_FF.psp
JK_FF\db\JK_FF.sgdiff.cdb
JK_FF\db\JK_FF.sgdiff.hdb
JK_FF\db\JK_FF.sld_design_entry_dsc.sci
JK_FF\db\JK_FF.syn_hier_info
JK_FF\db\JK_FF.map.cdb
JK_FF\db\JK_FF.map.hdb
JK_FF\db\JK_FF_cmp.qrpt
JK_FF\db\JK_FF.fit.qmsg
JK_FF\db\JK_FF.asm.qmsg
JK_FF\db\JK_FF.tan.qmsg
JK_FF\db\JK_FF.cmp.tdb
JK_FF\db\JK_FF.cmp0.ddb
JK_FF\db\JK_FF.cmp.cdb
JK_FF\db\JK_FF.cmp.hdb
JK_FF\db\JK_FF.cmp.rdb
JK_FF\db\JK_FF.sim.qmsg
JK_FF\db\JK_FF.sim.hdb
JK_FF\db\JK_FF.cmp.ddb
JK_FF\db\JK_FF.eds_overflow
JK_FF\db\JK_FF.sim.vwf
JK_FF\db\JK_FF.sim.rdb
JK_FF\db\JK_FF_sim.qrpt
JK_FF\db\JK_FF.sld_design_entry.sci
JK_FF\db\JK_FF.eco.cdb
JK_FF\db
JK_FF

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