Verylog prepared Quartus II platform attached to a simple design example simulation waveforms

Packet : 83390089ledwalk.rar filelist
LEDWALK\db\LEDWALK.(0).cnf.cdb
LEDWALK\db\LEDWALK.(0).cnf.hdb
LEDWALK\db\LEDWALK.asm.qmsg
LEDWALK\db\LEDWALK.cbx.xml
LEDWALK\db\LEDWALK.cmp.cdb
LEDWALK\db\LEDWALK.cmp.hdb
LEDWALK\db\LEDWALK.cmp.logdb
LEDWALK\db\LEDWALK.cmp.rdb
LEDWALK\db\LEDWALK.cmp.tdb
LEDWALK\db\LEDWALK.cmp0.ddb
LEDWALK\db\LEDWALK.dbp
LEDWALK\db\LEDWALK.db_info
LEDWALK\db\LEDWALK.eco.cdb
LEDWALK\db\LEDWALK.eds_overflow
LEDWALK\db\LEDWALK.fit.qmsg
LEDWALK\db\LEDWALK.hier_info
LEDWALK\db\LEDWALK.hif
LEDWALK\db\LEDWALK.map.cdb
LEDWALK\db\LEDWALK.map.hdb
LEDWALK\db\LEDWALK.map.logdb
LEDWALK\db\LEDWALK.map.qmsg
LEDWALK\db\LEDWALK.pre_map.cdb
LEDWALK\db\LEDWALK.pre_map.hdb
LEDWALK\db\LEDWALK.psp
LEDWALK\db\LEDWALK.rtlv.hdb
LEDWALK\db\LEDWALK.rtlv_sg.cdb
LEDWALK\db\LEDWALK.rtlv_sg_swap.cdb
LEDWALK\db\LEDWALK.sgdiff.cdb
LEDWALK\db\LEDWALK.sgdiff.hdb
LEDWALK\db\LEDWALK.sim.hdb
LEDWALK\db\LEDWALK.sim.qmsg
LEDWALK\db\LEDWALK.sim.rdb
LEDWALK\db\LEDWALK.sim.vwf
LEDWALK\db\LEDWALK.sld_design_entry.sci
LEDWALK\db\LEDWALK.sld_design_entry_dsc.sci
LEDWALK\db\LEDWALK.syn_hier_info
LEDWALK\db\LEDWALK.tan.qmsg
LEDWALK\db\wed.zsf
LEDWALK\db
LEDWALK\LEDWALK.asm.rpt
LEDWALK\LEDWALK.done
LEDWALK\LEDWALK.dpf
LEDWALK\LEDWALK.fit.rpt
LEDWALK\LEDWALK.fit.summary
LEDWALK\LEDWALK.flow.rpt
LEDWALK\LEDWALK.map.rpt
LEDWALK\LEDWALK.map.summary
LEDWALK\LEDWALK.pin
LEDWALK\LEDWALK.qpf
LEDWALK\LEDWALK.qsf
LEDWALK\LEDWALK.qws
LEDWALK\LEDWALK.sim.rpt
LEDWALK\LEDWALK.sim.vwf
LEDWALK\LEDWALK.tan.rpt
LEDWALK\LEDWALK.tan.summary
LEDWALK\LEDWALK.v
LEDWALK\LEDWALK.vwf
LEDWALK

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