ATmega128 single-chip serial debugging process, development environment iccavr.

Packet : 43680538uart_0.rar filelist
uart_0
uart_0\usart_0.src
uart_0\usart_0.prj
uart_0\myuart._h
uart_0\myport._h
uart_0\mydelay._c
uart_0\mydelay.h
uart_0\myuart.h
uart_0\define._h
uart_0\myport.h
uart_0\define.h
uart_0\main._c
uart_0\includes._h
uart_0\includes.h
uart_0\myport._c
uart_0\myport.c
uart_0\mydelay.c
uart_0\hex
uart_0\hex\usart_0.mak
uart_0\hex\usart_0.lk
uart_0\hex\main.dp2
uart_0\hex\mydelay.dp2
uart_0\hex\myuart.dp2
uart_0\hex\myport.dp2
uart_0\hex\mydelay.s
uart_0\hex\hex2bin.exe
uart_0\hex\time_delay.dp2
uart_0\hex\mydelay.lis
uart_0\hex\Tobin.bat
uart_0\hex\main.s
uart_0\hex\main.lis
uart_0\hex\myuart.s
uart_0\hex\myuart.lis
uart_0\hex\myport.s
uart_0\hex\myport.lis
uart_0\hex\time_delay.s
uart_0\hex\time_delay.lis
uart_0\hex\usart_0.hex
uart_0\hex\usart_0.cof
uart_0\hex\usart_0.mp
uart_0\hex\usart_0.dbg
uart_0\hex\usart_0.lst
uart_0\hex\USART_0.BIN
uart_0\hex\main.o
uart_0\hex\myport.o
uart_0\hex\mydelay.o
uart_0\hex\myport.i
uart_0\hex\mydelay.i
uart_0\hex\main.i
uart_0\hex\myuart.o
uart_0\main.c
uart_0\myuart._c
uart_0\myuart.c

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