Hierarchical design is completed using the countdown device type: 16-bit binary countdown start figures, starting the countdown to enable the digital input signal, the countdown began to signal, reset signal, 1MHz clock signal, 10Hz clock signal. Output: digital control data signals and Xuantong signals, signals the end of the countdown.

Packet : 111186748d11.rar filelist
control.vhd
counter.vhd
d11.vhd
display.vhd
input.vhd

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