Quartus HDLC codec under development include design documentation and reports, by RTL and timing simulation

HDLC成帧解帧器设计开发方案.doc
09214017HDLC\db\altsyncram_fd11.tdf
09214017HDLC\db\altsyncram_ok31.tdf
09214017HDLC\db\alt_synch_pipe_ikd.tdf
09214017HDLC\db\alt_synch_pipe_jkd.tdf
09214017HDLC\db\alt_synch_pipe_kkd.tdf
09214017HDLC\db\alt_synch_pipe_lkd.tdf
09214017HDLC\db\alt_synch_pipe_mkd.tdf
09214017HDLC\db\alt_synch_pipe_nkd.tdf
09214017HDLC\db\a_graycounter_inc.tdf
09214017HDLC\db\a_graycounter_jnc.tdf
09214017HDLC\db\a_graycounter_n97.tdf
09214017HDLC\db\cmpr_9a6.tdf
09214017HDLC\db\dcfifo_38i1.tdf
09214017HDLC\db\dcfifo_kci1.tdf
09214017HDLC\db\dcfifo_m9i1.tdf
09214017HDLC\db\dffpipe_hd9.tdf
09214017HDLC\db\dffpipe_id9.tdf
09214017HDLC\db\dffpipe_jd9.tdf
09214017HDLC\db\dffpipe_kd9.tdf
09214017HDLC\db\dffpipe_ld9.tdf
09214017HDLC\db\dffpipe_md9.tdf
09214017HDLC\db\HDLC.ae.hdb
09214017HDLC\db\HDLC.amm.cdb
09214017HDLC\db\HDLC.asm.qmsg
09214017HDLC\db\HDLC.asm.rdb
09214017HDLC\db\HDLC.asm_labs.ddb
09214017HDLC\db\HDLC.cbx.xml
09214017HDLC\db\HDLC.cmp.bpm
09214017HDLC\db\HDLC.cmp.cdb
09214017HDLC\db\HDLC.cmp.hdb
09214017HDLC\db\HDLC.cmp.kpt
09214017HDLC\db\HDLC.cmp.logdb
09214017HDLC\db\HDLC.cmp.rdb
09214017HDLC\db\HDLC.cmp_merge.kpt
09214017HDLC\db\HDLC.db_info
09214017HDLC\db\HDLC.eda.qmsg
09214017HDLC\db\HDLC.fit.qmsg
09214017HDLC\db\HDLC.hier_info
09214017HDLC\db\HDLC.hif
09214017HDLC\db\HDLC.idb.cdb
09214017HDLC\db\HDLC.lpc.html
09214017HDLC\db\HDLC.lpc.rdb
09214017HDLC\db\HDLC.lpc.txt
09214017HDLC\db\HDLC.map.bpm
09214017HDLC\db\HDLC.map.cdb
09214017HDLC\db\HDLC.map.hdb
09214017HDLC\db\HDLC.map.kpt
09214017HDLC\db\HDLC.map.logdb
09214017HDLC\db\HDLC.map.qmsg
09214017HDLC\db\HDLC.map_bb.cdb
09214017HDLC\db\HDLC.map_bb.hdb
09214017HDLC\db\HDLC.map_bb.logdb
09214017HDLC\db\HDLC.pre_map.cdb
09214017HDLC\db\HDLC.pre_map.hdb
09214017HDLC\db\HDLC.rpp.qmsg
09214017HDLC\db\HDLC.rtlv.hdb
09214017HDLC\db\HDLC.rtlv_sg.cdb
09214017HDLC\db\HDLC.rtlv_sg_swap.cdb
09214017HDLC\db\HDLC.sgate.rvd
09214017HDLC\db\HDLC.sgate_sm.rvd
09214017HDLC\db\HDLC.sgdiff.cdb
09214017HDLC\db\HDLC.sgdiff.hdb
09214017HDLC\db\HDLC.sld_design_entry.sci
09214017HDLC\db\HDLC.sld_design_entry_dsc.sci
09214017HDLC\db\HDLC.smart_action.txt
09214017HDLC\db\HDLC.smp_dump.txt
09214017HDLC\db\HDLC.sta.qmsg
09214017HDLC\db\HDLC.sta.rdb
09214017HDLC\db\HDLC.sta_cmp.6_slow_1200mv_85c.tdb
09214017HDLC\db\HDLC.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
09214017HDLC\db\HDLC.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
09214017HDLC\db\HDLC.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
09214017HDLC\db\HDLC.syn_hier_info
09214017HDLC\db\HDLC.tiscmp.fast_1200mv_0c.ddb
09214017HDLC\db\HDLC.tiscmp.slow_1200mv_0c.ddb
09214017HDLC\db\HDLC.tiscmp.slow_1200mv_85c.ddb
09214017HDLC\db\HDLC.tis_db_list.ddb
09214017HDLC\db\HDLC.tmw_info
09214017HDLC\db\logic_util_heursitic.dat
09214017HDLC\db\prev_cmp_HDLC.qmsg
09214017HDLC\greybox_tmp\cbx_args.txt
09214017HDLC\HDLC.asm.rpt
09214017HDLC\HDLC.done
09214017HDLC\HDLC.eda.rpt
09214017HDLC\HDLC.fit.rpt
09214017HDLC\HDLC.fit.smsg
09214017HDLC\HDLC.fit.summary
09214017HDLC\HDLC.flow.rpt
09214017HDLC\HDLC.map.rpt
09214017HDLC\HDLC.map.smsg
09214017HDLC\HDLC.map.summary
09214017HDLC\HDLC.pin
09214017HDLC\HDLC.qpf
09214017HDLC\HDLC.qsf
09214017HDLC\HDLC.sof
09214017HDLC\HDLC.sta.rpt
09214017HDLC\HDLC.sta.summary
09214017HDLC\HDLC_nativelink_simulation.rpt
09214017HDLC\HDLC_top.v

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