The development board of TR4, the D8M camera program. The output is the 10 bit data after MIPI decoding. include signaltap simulation results and connection diagrams

Filename	Size	Update
TR4_GPIO1_D8M	0	2018-09-17
TR4_GPIO1_D8M\Nios_result_3steps.png	16380	2016-07-07
TR4_GPIO1_D8M\Setup.png	515697	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\.qsys_edit	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\.qsys_edit\Qsys.xml	83342	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\.qsys_edit\Qsys_schematic.nlv	0	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\.qsys_edit\filters.xml	66	2018-08-29
TR4_GPIO1_D8M\TR4_D8M_I2C\.qsys_edit\preferences.xml	647	2018-08-29
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys.bsf	7191	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys.cmp	1282	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys.html	118889	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys.xml	1018276	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys_bb.v	857	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys_generation.rpt	18345	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys_inst.v	1616	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\Qsys_inst.vhd	2911	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\Qsys.debuginfo	807898	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\Qsys.qip	255026	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\Qsys.regmap	43785	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\Qsys.v	44254	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\greybox_tmp	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\greybox_tmp\cbx_args.txt	1571	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_irq_mapper.sv	1993	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_jtag_uart.v	17019	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_key.v	1843	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_led.v	2137	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mipi_pwdn_n.v	2225	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0.v	428533	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_avalon_st_adapter.v	6165	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv	3762	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_cmd_demux.sv	10545	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_cmd_demux_001.sv	4187	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_cmd_mux.sv	3798	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_cmd_mux_004.sv	11359	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_router.sv	11157	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_router_001.sv	8173	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_router_002.sv	7520	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_router_006.sv	7882	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_rsp_demux.sv	3537	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_rsp_demux_004.sv	4179	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_rsp_mux.sv	20000	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_mm_interconnect_0_rsp_mux_001.sv	12104	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2.v	6212	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu.ocp	856	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu.sdc	4120	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu.v	483960	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_bht_ram.mif	2451	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_dc_tag_ram.mif	851	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_debug_slave_sysclk.v	6224	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_debug_slave_tck.v	8316	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_debug_slave_wrapper.v	9504	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_ic_tag_ram.mif	1684	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_mult_cell.v	4241	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_ociram_default_contents.mif	4244	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_rf_ram_a.mif	600	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_rf_ram_b.mif	600	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_nios2_gen2_cpu_test_bench.v	38224	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_onchip_memory2_0.hex	525013	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_onchip_memory2_0.v	3016	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_sw.v	1835	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_sysid_qsys.v	1448	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\Qsys_timer.v	6862	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_avalon_sc_fifo.v	34467	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_avalon_st_pipeline_base.v	4705	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_arbitrator.sv	9530	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_burst_uncompressor.sv	13717	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_master_agent.sv	11333	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_master_translator.sv	20557	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_reorder_memory.sv	11247	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_slave_agent.sv	29997	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_slave_translator.sv	17338	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_merlin_traffic_limiter.sv	37098	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_reset_controller.sdc	1648	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_reset_controller.v	12329	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\altera_reset_synchronizer.v	3553	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\i2c_master_bit_ctrl.v	17341	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\i2c_master_byte_ctrl.v	10547	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\i2c_master_defines.v	3219	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\i2c_master_top.v	9912	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys\synthesis\submodules\i2c_opencores.v	1976	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys.qsys	49416	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\Qsys.sopcinfo	397798	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.qpf	112	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.qsf	23908	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.qws	619	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.sdc	2600	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.sof	11195621	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.v	3896	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C.v.bak	3930	2016-07-07
TR4_GPIO1_D8M\TR4_D8M_I2C\TR4_D8M_I2C_assignment_defaults.qdf	54530	2018-08-16
TR4_GPIO1_D8M\TR4_D8M_I2C\db	0	2018-09-17
TR4_GPIO1_D8M\TR4_D8M_I2C\db\.cmp.kpt	1536	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\db\TR4_D8M_I2C.(0).cnf.cdb	3139	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\db\TR4_D8M_I2C.(0).cnf.hdb	2131	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\db\TR4_D8M_I2C.(1).cnf.cdb	2162	2018-09-10
TR4_GPIO1_D8M\TR4_D8M_I2C\db\TR4_D8M_I2C.(1).cnf.hdb	1244	2018-09-10

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