VHDL-based electronic clock to achieve a simple electronic clock displays minutes and seconds of their time and date, through key alternately display

Packet : 61549825shiyan3.rar filelist
shiyan3\clock.asm.rpt
shiyan3\clock.cdf
shiyan3\clock.done
shiyan3\clock.dpf
shiyan3\clock.fit.rpt
shiyan3\clock.fit.smsg
shiyan3\clock.fit.summary
shiyan3\clock.flow.rpt
shiyan3\clock.hexout
shiyan3\clock.map.rpt
shiyan3\clock.map.summary
shiyan3\clock.pin
shiyan3\clock.pof
shiyan3\clock.qpf
shiyan3\clock.qsf
shiyan3\clock.qws
shiyan3\clock.sim.rpt
shiyan3\clock.sof
shiyan3\clock.tan.rpt
shiyan3\clock.tan.summary
shiyan3\clock.vhd
shiyan3\clock.vhd.bak
shiyan3\clock.vwf
shiyan3\clock_pkg.vhd
shiyan3\clock_pkg.vhd.bak
shiyan3\cnt60.vhd
shiyan3\cnt60.vhd.bak
shiyan3\day.vhd
shiyan3\hour.vhd
shiyan3\hour.vhd.bak
shiyan3\month.txt
shiyan3\month.vhd
shiyan3\shiyan3.flow.rpt
shiyan3\shiyan3.map.rpt
shiyan3\shiyan3.map.summary
shiyan3\shiyan3.qpf
shiyan3\shiyan3.qsf
shiyan3\shiyan3.qws
shiyan3\year.txt
shiyan3\year.vhd
shiyan3\db\clock.(0).cnf.cdb
shiyan3\db\clock.(0).cnf.hdb
shiyan3\db\clock.(1).cnf.cdb
shiyan3\db\clock.(1).cnf.hdb
shiyan3\db\clock.(2).cnf.cdb
shiyan3\db\clock.(2).cnf.hdb
shiyan3\db\clock.(3).cnf.cdb
shiyan3\db\clock.(3).cnf.hdb
shiyan3\db\clock.(4).cnf.cdb
shiyan3\db\clock.(4).cnf.hdb
shiyan3\db\clock.(5).cnf.cdb
shiyan3\db\clock.(5).cnf.hdb
shiyan3\db\clock.asm.qmsg
shiyan3\db\clock.cbx.xml
shiyan3\db\clock.cmp.cdb
shiyan3\db\clock.cmp.hdb
shiyan3\db\clock.cmp.kpt
shiyan3\db\clock.cmp.logdb
shiyan3\db\clock.cmp.rdb
shiyan3\db\clock.cmp.tdb
shiyan3\db\clock.cmp0.ddb
shiyan3\db\clock.dbp
shiyan3\db\clock.db_info
shiyan3\db\clock.eco.cdb
shiyan3\db\clock.fit.qmsg
shiyan3\db\clock.hier_info
shiyan3\db\clock.hif
shiyan3\db\clock.map.cdb
shiyan3\db\clock.map.hdb
shiyan3\db\clock.map.logdb
shiyan3\db\clock.map.qmsg
shiyan3\db\clock.pre_map.cdb
shiyan3\db\clock.pre_map.hdb
shiyan3\db\clock.psp
shiyan3\db\clock.rtlv.hdb
shiyan3\db\clock.rtlv_sg.cdb
shiyan3\db\clock.rtlv_sg_swap.cdb
shiyan3\db\clock.sgdiff.cdb
shiyan3\db\clock.sgdiff.hdb
shiyan3\db\clock.signalprobe.cdb
shiyan3\db\clock.sld_design_entry.sci
shiyan3\db\clock.sld_design_entry_dsc.sci
shiyan3\db\clock.syn_hier_info
shiyan3\db\clock.tan.qmsg
shiyan3\db\prev_cmp_clock.asm.qmsg
shiyan3\db\prev_cmp_clock.fit.qmsg
shiyan3\db\prev_cmp_clock.map.qmsg
shiyan3\db\prev_cmp_clock.qmsg
shiyan3\db\prev_cmp_clock.sim.qmsg
shiyan3\db\prev_cmp_clock.tan.qmsg
shiyan3\db\shiyan3.cbx.xml
shiyan3\db\shiyan3.cmp.rdb
shiyan3\db\shiyan3.db_info
shiyan3\db\shiyan3.eco.cdb
shiyan3\db\shiyan3.hif
shiyan3\db\shiyan3.map.hdb
shiyan3\db\shiyan3.map.qmsg
shiyan3\db\shiyan3.sld_design_entry.sci
shiyan3\db\shiyan3.sld_design_entry_dsc.sci
shiyan3\db\wed.wsf
shiyan3\db
shiyan3

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