设计一个4对1复用器（输入：I3 I2 I1 I0，输出：F ，另有两个输入控制端S1与S0控制输出选择），真值表如图1。 S1 S0 F 0 0 0 1 1 0 1 1 I0 I1 I2 I3

Packet : my1.rar filelist
my1/db/logic_util_heursitic.dat
my1/db/my41.(0).cnf.cdb
my1/db/my41.(0).cnf.hdb
my1/db/my41.asm.qmsg
my1/db/my41.asm.rdb
my1/db/my41.cbx.xml
my1/db/my41.cmp.idb
my1/db/my41.cmp.kpt
my1/db/my41.cmp.rdb
my1/db/my41.cmp_merge.kpt
my1/db/my41.db_info
my1/db/my41.eda.qmsg
my1/db/my41.fit.qmsg
my1/db/my41.hier_info
my1/db/my41.hif
my1/db/my41.ipinfo
my1/db/my41.lpc.html
my1/db/my41.lpc.rdb
my1/db/my41.lpc.txt
my1/db/my41.map.ammdb
my1/db/my41.map.bpm
my1/db/my41.map.cdb
my1/db/my41.map.hdb
my1/db/my41.map.kpt
my1/db/my41.map.logdb
my1/db/my41.map.qmsg
my1/db/my41.map.rdb
my1/db/my41.map_bb.cdb
my1/db/my41.map_bb.hdb
my1/db/my41.map_bb.logdb
my1/db/my41.pre_map.hdb
my1/db/my41.pti_db_list.ddb
my1/db/my41.root_partition.map.reg_db.cdb
my1/db/my41.routing.rdb
my1/db/my41.rtlv.hdb
my1/db/my41.rtlv_sg.cdb
my1/db/my41.rtlv_sg_swap.cdb
my1/db/my41.sgdiff.cdb
my1/db/my41.sgdiff.hdb
my1/db/my41.sld_design_entry.sci
my1/db/my41.sld_design_entry_dsc.sci
my1/db/my41.smart_action.txt
my1/db/my41.sta.qmsg
my1/db/my41.sta.rdb
my1/db/my41.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
my1/db/my41.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
my1/db/my41.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
my1/db/my41.syn_hier_info
my1/db/my41.tiscmp.fast_1200mv_0c.ddb
my1/db/my41.tiscmp.slow_1200mv_0c.ddb
my1/db/my41.tiscmp.slow_1200mv_85c.ddb
my1/db/my41.tis_db_list.ddb
my1/db/my41.tmw_info
my1/db/my41.vpr.ammdb
my1/db/prev_cmp_my41.qmsg
my1/incremental_db/compiled_partitions/my41.db_info
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.ammdb
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.cdb
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.dfp
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.hdb
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.kpt
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.logdb
my1/incremental_db/compiled_partitions/my41.root_partition.cmp.rcfdb
my1/incremental_db/compiled_partitions/my41.root_partition.map.cdb
my1/incremental_db/compiled_partitions/my41.root_partition.map.dpi
my1/incremental_db/compiled_partitions/my41.root_partition.map.hbdb.cdb
my1/incremental_db/compiled_partitions/my41.root_partition.map.hbdb.hb_info
my1/incremental_db/compiled_partitions/my41.root_partition.map.hbdb.hdb
my1/incremental_db/compiled_partitions/my41.root_partition.map.hbdb.sig
my1/incremental_db/compiled_partitions/my41.root_partition.map.hdb
my1/incremental_db/compiled_partitions/my41.root_partition.map.kpt
my1/incremental_db/README
my1/my41.qpf
my1/my41.qsf
my1/my41.qws
my1/my41.v
my1/my41_nativelink_simulation.rpt
my1/output_files/my41.asm.rpt
my1/output_files/my41.done
my1/output_files/my41.eda.rpt
my1/output_files/my41.fit.rpt
my1/output_files/my41.fit.smsg
my1/output_files/my41.fit.summary
my1/output_files/my41.flow.rpt
my1/output_files/my41.jdi
my1/output_files/my41.map.rpt
my1/output_files/my41.map.summary
my1/output_files/my41.pin
my1/output_files/my41.sof
my1/output_files/my41.sta.rpt
my1/output_files/my41.sta.summary
my1/simulation/modelsim/gate_work/my41/verilog.prw
my1/simulation/modelsim/gate_work/my41/verilog.psm
my1/simulation/modelsim/gate_work/my41/_primary.dat
my1/simulation/modelsim/gate_work/my41/_primary.dbs
my1/simulation/modelsim/gate_work/my41/_primary.vhd
my1/simulation/modelsim/gate_work/my41_tb/verilog.prw
my1/simulation/modelsim/gate_work/my41_tb/verilog.psm
my1/simulation/modelsim/gate_work/my41_tb/_primary.dat
my1/simulation/modelsim/gate_work/my41_tb/_primary.dbs
my1/simulation/modelsim/gate_work/my41_tb/_primary.vhd
my1/simulation/modelsim/gate_work/_info
my1/simulation/modelsim/gate_work/_vmake
my1/simulation/modelsim/modelsim.ini
my1/simulation/modelsim/msim_transcript
my1/simulation/modelsim/my41.sft
my1/simulation/modelsim/my41.vo
my1/simulation/modelsim/my41_6_1200mv_0c_slow.vo
my1/simulation/modelsim/my41_6_1200mv_0c_v_slow.sdo
my1/simulation/modelsim/my41_6_1200mv_85c_slow.vo
my1/simulation/modelsim/my41_6_1200mv_85c_v_slow.sdo
my1/simulation/modelsim/my41_min_1200mv_0c_fast.vo
my1/simulation/modelsim/my41_min_1200mv_0c_v_fast.sdo
my1/simulation/modelsim/my41_modelsim.xrf
my1/simulation/modelsim/my41_run_msim_gate_verilog.do
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do.bak
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do.bak1
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do.bak2
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do.bak3
my1/simulation/modelsim/my41_run_msim_rtl_verilog.do.bak4
my1/simulation/modelsim/my41_v.sdo
my1/simulation/modelsim/rtl_work/my41/verilog.prw
my1/simulation/modelsim/rtl_work/my41/verilog.psm
my1/simulation/modelsim/rtl_work/my41/_primary.dat
my1/simulation/modelsim/rtl_work/my41/_primary.dbs
my1/simulation/modelsim/rtl_work/my41/_primary.vhd
my1/simulation/modelsim/rtl_work/my41_tb/verilog.prw
my1/simulation/modelsim/rtl_work/my41_tb/verilog.psm
my1/simulation/modelsim/rtl_work/my41_tb/_primary.dat
my1/simulation/modelsim/rtl_work/my41_tb/_primary.dbs
my1/simulation/modelsim/rtl_work/my41_tb/_primary.vhd
my1

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