Introduction - If you have any usage issues, please Google them yourself
using Verilog filter function to achieve through integrated simulation software, the use of FPGA
Packet : 3971009filter 代码.rar filelist
filter\basicfir.fda
filter\filter.vhd
filter\filter_tb.vhd
filter\vsim.wlf
filter\work\filter\rtl.asm
filter\work\filter\rtl.dat
filter\work\filter\_primary.dat
filter\work\filter
filter\work\filter_tb\test.asm
filter\work\filter_tb\test.dat
filter\work\filter_tb\_primary.dat
filter\work\filter_tb
filter\work\_info
filter\work
filter