design a module from a trip data flow channeling Lane detected bitstream "11100", this module includes reset, clk, datain and output pmatch

Packet : 117143195codestream.rar filelist
hw3
hw3\0.mgf
hw3\1.mgf
hw3\3.mgf
hw3\bde.set
hw3\compile
hw3\compile\contents.lib~
hw3\compile\hw3.epr
hw3\compile\hw3.erf
hw3\compile\sources.sth
hw3\compile.cfg
hw3\elaboration.log
hw3\hw3.adf
hw3\hw3.LIB
hw3\hw3.wsp
hw3\log
hw3\log\console.log
hw3\projlib.cfg
hw3\src
hw3\src\hw3.vhd
hw3\src\stream.awf
hw3\src\test_stream.vhd

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