openaccess with Verilog into each other when used in the source code, the installation of the windows and openaccess on Linux can use.

Packet : 61549841oaverilog.rar filelist
oaVerilog\build.rules
oaVerilog\build.variables
oaVerilog\GNUmakefile
oaVerilog\local.rules
oaVerilog\oa2verilog\GNUmakefile
oaVerilog\oa2verilog\oa2verilog
oaVerilog\oa2verilog\oa2verilog.cpp
oaVerilog\oa2verilog\oa2verilog.vcproj
oaVerilog\oa2verilog
oaVerilog\oaVerilogDynamic.sln
oaVerilog\src\c.m4
oaVerilog\src\GNUmakefile
oaVerilog\src\Hfiles.defs
oaVerilog\src\lex.backup
oaVerilog\src\m4sugar\m4sugar.m4
oaVerilog\src\m4sugar
oaVerilog\src\oaVerilog.h
oaVerilog\src\oaVerilog.vcproj
oaVerilog\src\oaVerilogAnnotate.cpp
oaVerilog\src\oaVerilogAnnotate.h
oaVerilog\src\oaVerilogCallbacksIn.cpp
oaVerilog\src\oaVerilogCallbacksIn.h
oaVerilog\src\oaVerilogCallbacksOut.cpp
oaVerilog\src\oaVerilogCallbacksOut.h
oaVerilog\src\oaVerilogCmpTerms.cpp
oaVerilog\src\oaVerilogCmpTerms.h
oaVerilog\src\oaVerilogCmpTerms.inl
oaVerilog\src\oaVerilogConnection.h
oaVerilog\src\oaVerilogConnection.inl
oaVerilog\src\oaVerilogError.cpp
oaVerilog\src\oaVerilogError.h
oaVerilog\src\oaVerilogError.inl
oaVerilog\src\oaVerilogFlexLexer.h
oaVerilog\src\oaVerilogIn.cpp
oaVerilog\src\oaVerilogIn.h
oaVerilog\src\oaVerilogIn.inl
oaVerilog\src\oaVerilogInPvt.h
oaVerilog\src\oaVerilogLeafMgr.cpp
oaVerilog\src\oaVerilogLeafMgr.h
oaVerilog\src\oaVerilogModuleCallbacksIn.cpp
oaVerilog\src\oaVerilogModuleCallbacksIn.h
oaVerilog\src\oaVerilogMsgs.eng
oaVerilog\src\oaVerilogMsgs.h
oaVerilog\src\oaVerilogNameList.cpp
oaVerilog\src\oaVerilogNameList.h
oaVerilog\src\oaVerilogNameList.inl
oaVerilog\src\oaVerilogOptions.cpp
oaVerilog\src\oaVerilogOptions.h
oaVerilog\src\oaVerilogOptionsIn.cpp
oaVerilog\src\oaVerilogOptionsIn.h
oaVerilog\src\oaVerilogOptionsOut.cpp
oaVerilog\src\oaVerilogOptionsOut.h
oaVerilog\src\oaVerilogOut.cpp
oaVerilog\src\oaVerilogOut.h
oaVerilog\src\oaVerilogOutPvt.h
oaVerilog\src\oaVerilogParamList.cpp
oaVerilog\src\oaVerilogParamList.h
oaVerilog\src\oaVerilogParamList.inl
oaVerilog\src\oaVerilogParser.skl
oaVerilog\src\oaVerilogParser.ypp
oaVerilog\src\oaVerilogParserBase.cpp
oaVerilog\src\oaVerilogParserBase.h
oaVerilog\src\oaVerilogParserBase.inl
oaVerilog\src\oaVerilogParserStype.h
oaVerilog\src\oaVerilogParserStype.inl
oaVerilog\src\oaVerilogRange.cpp
oaVerilog\src\oaVerilogRange.h
oaVerilog\src\oaVerilogRange.inl
oaVerilog\src\oaVerilogScanner.h
oaVerilog\src\oaVerilogScanner.inl
oaVerilog\src\oaVerilogScanner.lpp
oaVerilog\src\oaVerilogScanner.skl
oaVerilog\src\oaVerilogTypes.h
oaVerilog\src\oaVerilogValue.cpp
oaVerilog\src\oaVerilogValue.h
oaVerilog\src\oaVerilogValue.inl
oaVerilog\src\oaVerilogWriterCallback.cpp
oaVerilog\src\oaVerilogWriterCallback.h
oaVerilog\src
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oaVerilog\test\oaVerilogAnnotateTest.cpp
oaVerilog\test\oaVerilogAnnotateTest.h
oaVerilog\test\oaVerilogCmpTermsTest.cpp
oaVerilog\test\oaVerilogCmpTermsTest.h
oaVerilog\test\oaVerilogDesignDebug.cpp
oaVerilog\test\oaVerilogDesignDebug.h
oaVerilog\test\oaVerilogInErrorsTest.cpp
oaVerilog\test\oaVerilogInErrorsTest.h
oaVerilog\test\oaVerilogInExistingTest.cpp
oaVerilog\test\oaVerilogInExistingTest.h
oaVerilog\test\oaVerilogInFileSysTest.cpp
oaVerilog\test\oaVerilogInFileSysTest.h
oaVerilog\test\oaVerilogInLeafTest.cpp
oaVerilog\test\oaVerilogInLeafTest.h
oaVerilog\test\oaVerilogInMultiFileTest.cpp
oaVerilog\test\oaVerilogInMultiFileTest.h
oaVerilog\test\oaVerilogInOptionsTest.cpp
oaVerilog\test\oaVerilogInOptionsTest.h
oaVerilog\test\oaVerilogInSampleTest.cpp
oaVerilog\test\oaVerilogInSampleTest.h
oaVerilog\test\oaVerilogInStubTest.cpp
oaVerilog\test\oaVerilogInStubTest.h
oaVerilog\test\oaVerilogInTest.cpp
oaVerilog\test\oaVerilogInTest.h
oaVerilog\test\oaVerilogInTest.inl
oaVerilog\test\oaVerilogInTestCB.cpp
oaVerilog\test\oaVerilogInVliTest.cpp
oaVerilog\test\oaVerilogInVliTest.h
oaVerilog\test\oaVerilogOutDesign.cpp
oaVerilog\test\oaVerilogOutDesign.h
oaVerilog\test\oaVerilogOutExternalTest.cpp
oaVerilog\test\oaVerilogOutExternalTest.h
oaVerilog\test\oaVerilogOutOptionsTest.cpp
oaVerilog\test\oaVerilogOutOptionsTest.h
oaVerilog\test\oaVerilogOutScalarize.cpp
oaVerilog\test\oaVerilogOutScalarize.h
oaVerilog\test\oaVerilogOutTest.cpp
oaVerilog\test\oaVerilogOutTest.h
oaVerilog\test\oaVerilogOutUnbound.cpp
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oaVerilog\test\oaVerilogTest.cpp
oaVerilog\test\oaVerilogTest.h
oaVerilog\test\oaVerilogTest.vcproj
oaVerilog\test\oaVerilogUnconnectedTest.cpp
oaVerilog\test\oaVerilogUnconnectedTest.h
oaVerilog\test\testDir\annotate.ref
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oaVerilog\test\testDir\badOrderLeaf3.v
oaVerilog\test\testDir\badToken.v
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oaVerilog\test\testDir\hier.ref
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oaVerilog\test\testDir\IEEEports.v
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oaVerilog\test\testDir\implicitWire.ref
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oaVerilog\test\testDir\inconsistentTerm.v
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oaVerilog\test\testDir\leaf.v
oaVerilog\test\testDir\leafExplicit.v
oaVerilog\test\testDir\leafSearch.v
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oaVerilog\test\testDir\multiFile.ref
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oaVerilog\test\testDir\multiFile3.v
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oaVerilog\test\testDir\outOptions.ref
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oaVerilog\test\testDir\pcr739428.ref
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oaVerilog\test\testDir\pcr776966.ref
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oaVerilog\test\testDir\pcr782725.ref
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oaVerilog\test\testDir\pcr809209.ref
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oaVerilog\test\testDir\portDecls.ref
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oaVerilog\test\testDir\redef.ref
oaVerilog\test\testDir\redef.v
oaVerilog\test\testDir\scalarize.ref
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oaVerilog\test\testDir\stubOrder.v
oaVerilog\test\testDir\stubTermWidth.v
oaVerilog\test\testDir\syntax.v
oaVerilog\test\testDir\termNotFoundLeaf1.v
oaVerilog\test\testDir\termNotFoundLeaf2.v
oaVerilog\test\testDir\termNotFoundLeaf3.v
oaVerilog\test\testDir\tieHiDecl.v
oaVerilog\test\testDir\tieLoDecl.v
oaVerilog\test\testDir\unbound.ref
oaVerilog\test\testDir\unconnected.ref
oaVerilog\test\testDir\vli.ref
oaVerilog\test\testDir\width.ref
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oaVerilog\test\testDir\widthMismatch.v
oaVerilog\test\testDir\widthMismatch2.v
oaVerilog\test\testDir\widthMismatchOrder.v
oaVerilog\test\testDir
oaVerilog\test
oaVerilog\verilog2oa\GNUmakefile
oaVerilog\verilog2oa\verilog2oa
oaVerilog\verilog2oa\verilog2oa.cpp
oaVerilog\verilog2oa\verilog2oa.vcproj
oaVerilog\verilog2oa
oaVerilog\verilogAnnotate\GNUmakefile
oaVerilog\verilogAnnotate\verilogAnnotate
oaVerilog\verilogAnnotate\verilogAnnotate.cpp
oaVerilog\verilogAnnotate\verilogAnnotate.vcproj
oaVerilog\verilogAnnotate
oaVerilog

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