my own use VHDL to achieve series dds, able sine, square, triangle wave.

Packet : 49636984ddfs.rar filelist
ddfs\ddsc.acf
ddfs\ddsc.vhd
ddfs\ddsc.hif
ddfs\sin_rom.acf
ddfs\sin_rom.mif
ddfs\sin_rom.hif
ddfs\rom.tdf
ddfs\rom.inc
ddfs\rom.cmp
ddfs\rom.sym
ddfs\rom_inst.tdf
ddfs\rom.acf
ddfs\rom.hif
ddfs\rom.cnf
ddfs\rom.vhd
ddfs\rom_inst.vhd
ddfs\rom.mmf
ddfs\sin_rom.vhd
ddfs\adder32b.acf
ddfs\adder32b.vhd
ddfs\reg32b.acf
ddfs\reg32b.vhd
ddfs\adder10b.acf
ddfs\adder10b.vhd
ddfs\reg10b.acf
ddfs\reg10b.vhd
ddfs\adder32b.hif
ddfs\adder10b.hif
ddfs\reg10b.hif
ddfs\reg32b.hif
ddfs\ddsc.cnf
ddfs\DDSC.sym
ddfs\ddsc(1).cnf
ddfs\ddsc(2).cnf
ddfs\ddsc(3).cnf
ddfs\ddsc(4).cnf
ddfs\ddsc(5).cnf
ddfs\ddsc(6).cnf
ddfs\ddsc(7).cnf
ddfs\ddsc(8).cnf
ddfs\ddsc(9).cnf
ddfs\ddsc.ndb
ddfs\ddsc.mmf
ddfs\U2722998.DLS
ddfs\U8433380.DLS
ddfs\U3283816.DLS
ddfs\LIB.DLS
ddfs

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