use VHDL description of a simple microprocessor, can modify the source codes to adjust instruction set, Quartus II can be directly compiled and running.

Packet : 95302928vhdl_processor.rar filelist
VHDL_yuanlai\cpu_mm_manager3.qpf
VHDL_yuanlai\cpu_mm_manager3.qsf
VHDL_yuanlai\db\cpu_mm_manager3.sim.qmsg
VHDL_yuanlai\db\cpu_mm_manager3.db_info
VHDL_yuanlai\db\cpu_mm_manager3.sim.vwf
VHDL_yuanlai\db\cpu_mm_manager3.map.qmsg
VHDL_yuanlai\db\cpu_mm_manager3.(0).cnf.cdb
VHDL_yuanlai\db\cpu_mm_manager3.sld_design_entry.sci
VHDL_yuanlai\db\cpu_mm_manager3.(0).cnf.hdb
VHDL_yuanlai\db\cpu_mm_manager3.sim.rdb
VHDL_yuanlai\db\cpu_mm_manager3_sim.qrpt
VHDL_yuanlai\db\cpu_mm_manager3.fit.qmsg
VHDL_yuanlai\db\cpu_mm_manager3.hif
VHDL_yuanlai\db\cpu_mm_manager3.cmp.rdb
VHDL_yuanlai\db\cpu_mm_manager3.hier_info
VHDL_yuanlai\db\cpu_mm_manager3.rtlv.hdb
VHDL_yuanlai\db\cpu_mm_manager3.map.cdb
VHDL_yuanlai\db\cpu_mm_manager3.sgdiff.cdb
VHDL_yuanlai\db\cpu_mm_manager3.sgdiff.hdb
VHDL_yuanlai\db\cpu_mm_manager3.map.hdb
VHDL_yuanlai\db\cpu_mm_manager3.dat_manager.dat
VHDL_yuanlai\db\cpu_mm_manager3.pre_map.hdb
VHDL_yuanlai\db\cpu_mm_manager3.rtlv_sg_swap.cdb
VHDL_yuanlai\db\cpu_mm_manager3.rtlv_sg.cdb
VHDL_yuanlai\db\cpu_mm_manager3.project.hdb
VHDL_yuanlai\db\cpu_mm_manager3.syn_hier_info
VHDL_yuanlai\db\cpu_mm_manager3.sim.hdb
VHDL_yuanlai\db\cpu_mm_manager3.asm.qmsg
VHDL_yuanlai\db\cpu_mm_manager3.tan.qmsg
VHDL_yuanlai\db\cpu_mm_manager3.sld_design_entry_dsc.sci
VHDL_yuanlai\db\cpu_mm_manager3.cmp.ddb
VHDL_yuanlai\db\cpu_mm_manager3.cmp.cdb
VHDL_yuanlai\db\cpu_mm_manager3_cmp.qrpt
VHDL_yuanlai\db\cpu_mm_manager3.signalprobe.cdb
VHDL_yuanlai\db\cpu_mm_manager3.cmp.hdb
VHDL_yuanlai\db\cpu_mm_manager3.cmp.tdb
VHDL_yuanlai\db\cpu_mm_manager3.icc
VHDL_yuanlai\db
VHDL_yuanlai\cpu_mm_manager3.map.eqn
VHDL_yuanlai\cpu_mm_manager3.map.rpt
VHDL_yuanlai\cpu_mm_manager3.flow.rpt
VHDL_yuanlai\cpu_mm_manager3.map.summary
VHDL_yuanlai\cpu_mm_manager3.fit.eqn
VHDL_yuanlai\cpu_mm_manager3.pin
VHDL_yuanlai\cpu_mm_manager3.fit.rpt
VHDL_yuanlai\cpu_mm_manager3.fit.summary
VHDL_yuanlai\cpu_mm_manager3.sof
VHDL_yuanlai\cpu_mm_manager3.pof
VHDL_yuanlai\cpu_mm_manager3.asm.rpt
VHDL_yuanlai\cpu_mm_manager3.tan.summary
VHDL_yuanlai\cpu_mm_manager3.tan.rpt
VHDL_yuanlai\cpu_mm_manager3.done
VHDL_yuanlai\cpu_mm_manager3.qws
VHDL_yuanlai\cmp_state.ini
VHDL_yuanlai\Main_connect.vwf
VHDL_yuanlai\cpu_mm_manager3.vwf
VHDL_yuanlai\sim.cfg
VHDL_yuanlai\cpu_mm_manager3.sim.rpt
VHDL_yuanlai\cpu_mm_manager3.vhd
VHDL_yuanlai

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