Introduction - If you have any usage issues, please Google them yourself
simulation package contains the I2C operation of the bottom subroutine, prior to the use of a good definition of SCL and SDA. The standard model 8051 (12 Clock), the speed requirement is no more than 12MHz (that is, a machine cycle TI) if Fosc
Packet : 71477229vi2c_24a.rar filelist
VI2C_24A.inc