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arm_fft
Downloaded:0
ADS1.2 species with the ARM fft code
Update
: 2008-10-13
Size
: 223.28kb
Publisher
:
zz
Interactive
Downloaded:0
Ad-Hoc (peer-to-peer) mode: ad-hoc mode on and before the concept of Direct Connect twisted pair, is P2P connections, so it can not compete with other network communication. General wireless device such as PMP, PSP, DMA
Update
: 2008-10-13
Size
: 6.35kb
Publisher
:
灵朗
91331990five
Downloaded:0
Gobang a source file, as well as the design process of the basic thinking and playing
Update
: 2008-10-13
Size
: 165.41kb
Publisher
:
王天
tree
Downloaded:0
Tree is a very powerful data structure, it is characterized by a maximum of each node is only one pre-node, a number of follow-up node!
Update
: 2008-10-13
Size
: 2.79kb
Publisher
:
灵朗
kakuro_solver
Downloaded:0
Questions can be simple quick solution to enter the game in text form and text output
Update
: 2008-10-13
Size
: 9.12kb
Publisher
:
宇天
TurnPicture
Downloaded:0
JApplet small in this application, images are about to switch, flip past the feeling of an upset before the show is over and then after a
Update
: 2008-10-13
Size
: 1.72kb
Publisher
:
灵朗
ShowDocument
Downloaded:0
The small applications through GetAppletContext () method AppletContext type of object.* In AppletContext interface provides methods showDocument (), used to request the browser displays a
Update
: 2008-10-13
Size
: 1.64kb
Publisher
:
灵朗
SpecialImage
Downloaded:0
This is a show images JApplet, an image to be displayed one,* under the effect of a slowly expanding from the center until the first live coverage of an
Update
: 2008-10-13
Size
: 1.76kb
Publisher
:
灵朗
dds_using_FPGA
Downloaded:0
Verilog prepared based on the FPGA to achieve the DDS
Update
: 2008-10-13
Size
: 438.39kb
Publisher
:
宇天
fir_using_FPGA
Downloaded:0
Verilog-based filtering of fir and bring matlab simulation
Update
: 2008-10-13
Size
: 23.84kb
Publisher
:
宇天
sram_control
Downloaded:0
Verilog FPGA with the preparation of SRAM chip communication module
Update
: 2008-10-13
Size
: 409.06kb
Publisher
:
宇天
PD_using_FPGA
Downloaded:1
Verilog preparation phase of the FPGA-based module
Update
: 2008-10-13
Size
: 435.83kb
Publisher
:
宇天
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11383
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