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MSP430 the AD conversion process-IAR development environment
Update : 2008-10-13 Size : 1.03kb Publisher : 李连骏

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err
Update : 2008-10-13 Size : 3.83kb Publisher : 任伟

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MSP430 digital tube driver- IAR development environment
Update : 2008-10-13 Size : 829byte Publisher : 李连骏

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MSP430 delay subroutine-IAR development environment
Update : 2008-10-13 Size : 2.14kb Publisher : 李连骏

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c++ to do the wavelet analysis procedures, using wavelet neural network to time series prediction.
Update : 2008-10-13 Size : 6.46kb Publisher : 李建伟

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Use Quartus II to design FPGA application design examples "\ Example-b3-1\uart_regs\ SRC" directory is the design source file "\ Example-b3-1\uart_regs\ core" is the IP macro function module of Altera The "\ Example-b3-1
Update : 2008-10-13 Size : 388.56kb Publisher : king

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Application of the basic macro features Altera Design
Update : 2008-10-13 Size : 296.11kb Publisher : king

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Altera IP Application Design
Update : 2008-10-13 Size : 385.3kb Publisher : king

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DSP control of the AIC23 routines, a good reference to look at the configuration register.
Update : 2008-10-13 Size : 14.03kb Publisher : yang

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Altera use ModelSim for functional simulation for designs that do not use Altera
Update : 2008-10-13 Size : 3.74mb Publisher : king

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LCD graphic display menu management _ _PCF8583_TWI_SPI open all C code, and have PROTUES anti-truth, in the company
Update : 2008-10-13 Size : 1.09kb Publisher : 李志聪

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A function of a better virtual CAD software source code VCAD1.0
Update : 2008-10-13 Size : 224.2kb Publisher : 孙继超
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