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P89V51RD2 has a programmable watchdog timer (WDT), can be used for system fail-safe protection against software deadlock and automatic recovery. WDT in the CPU running out of control falling into the hands of the case ca
Update : 2008-10-13 Size : 227.28kb Publisher : yudakui

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Single-chip design with 51 clock circuit (Thesis) program 2007-09-11 10:02:34
Update : 2008-10-13 Size : 11.4kb Publisher : yudakui

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Update : 2008-10-13 Size : 5.5kb Publisher : yudakui

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PDIUSBD12 designed with USB sound card to the information, it is all-in great detail
Update : 2008-10-13 Size : 169.63kb Publisher : hhxy

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Verilog HDL, prepared by four digital tube dynamic display procedures, the external circuit with CPLD to realize
Update : 2008-10-13 Size : 852byte Publisher : yangytp

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An older algorithm graph theory books, did not find the title is from the Chaoxing PDG into PDF
Update : 2008-10-13 Size : 5.01mb Publisher : Claude Lee

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Shiyan image analysis and image processing (time-frequency transform) a small software
Update : 2008-10-13 Size : 22.87kb Publisher : Neo

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Tutorial on msc51 SCM, pdg format. Please make sure readers have related.
Update : 2008-10-13 Size : 26.75mb Publisher : 刘言

To remove the background, the subtraction image and background image and binarization
Update : 2008-10-13 Size : 820byte Publisher : 曾汉霖

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Many useful small single-chip development process, can refer to other procedures used in
Update : 2008-10-13 Size : 137.33kb Publisher : 燕子

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Sinusoidal signal spectrum graphics, short of coding procedures, using matlab realize. Can realize a simple frequency spectrum
Update : 2008-10-13 Size : 2.42kb Publisher : 杨杨

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sift the matlab code, is the latest, well, there are a lot of detail, you can try.
Update : 2008-10-13 Size : 2.75mb Publisher : 小美
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