VHDL-FPGA-Verilog List Page 14

VHDL-FPGA-Verilog list

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通信协议FPGA Downloaded：0: This design is based on FPGA high-speed parallel interface communication interface and protocol design, the design uses 8 Bit parallel interface ensures the data stability under high-speed parallel by configuring the FIF
Update : 2024-05-20 Size : 18.7mb Publisher : 蔺娇娇
new Downloaded：0: Accelerometers adxl357 read the acceleration value of XYZ three-axis direction through SPI
Update : 2024-05-20 Size : 5kb Publisher : LJHER
basketball_24time1 Downloaded：0: This document mainly uses Verilog language to realize basketball 24 second timer, which is a big assignment of digital electronic technology course I do. It contains the entire folder. After decompression, it can be run
Update : 2024-05-20 Size : 5.38mb Publisher : 1003512666
Xilinx Downloaded：0: LDPC, CPRI, Turbo, Polar, JESD204B/C HDMI1.4/2.0, MIPI CSI-2, MIPI DSI AXI CAN AXI USB2.0 SD Card Host Reed-Solomon Decoder/Encoder 10G Enthernet MAC 25G Enthernet MAC 40G Enthernet MAC 50G Enthernet MAC 100G Enthernet M
Update : 2024-05-20 Size : 1kb Publisher : liyan2020
ac620_calculator_key_board Downloaded：0: The calculator based on Verilog uses matrix keyboard to input data and digital tube to display the operation process and results. The development board based on little mac620 passed the verification
Update : 2024-05-20 Size : 40kb Publisher : 小梅哥fpga
FPGA实现Jpeg压缩，和视频采集程序 Downloaded：0: Zynq - Main - register access Mio
Update : 2024-05-20 Size : 101kb Publisher : kongqiweiliang
基于FPGA的多路同步脉冲发生器设计1 Downloaded：0: Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and
Update : 2024-05-20 Size : 10kb Publisher : 哈哈哈哈daxiao
vivado2018+IPs Downloaded：0: Xilinx Vivado 2018 License File
Update : 2024-05-20 Size : 4kb Publisher : Indus_Floyd
DDR2_SDRAM操作时序 Downloaded：0: DDR2? SDRAM operation sequence, very detailed introduction, very good
Update : 2024-05-20 Size : 1.85mb Publisher : zou3
led_test.v Downloaded：0: show a water led show a water led show a water led show a water led show a water led
Update : 2020-04-07 Size : 759byte Publisher : rbvikg
verilog实例 [43项] Downloaded：0: Some digital function modules described by Verilog, such as synchronous asynchronous FIFO and ram, are suitable for novice learning
Update : 2024-05-20 Size : 186kb Publisher : hayto
SPI_UVM_VIP Downloaded：1: Chip verification VIP of SPI protocol, build platform verification code with UVM
Update : 2024-05-20 Size : 5.22mb Publisher : lfzero

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